Fine-grain Parallelism of MrBayes on Multi- and Many-core Architectures
Currently, we are facing a situation where applications exhibit increasing computational demands. In particular, we observe a considerable increase of complexity in algorithms due to both the increasing amounts of data available for analysis (e.g., genomic databases) and the need for more accurate and precise results (e.g., more complex particle interaction models). In this talk we address how MrBayes, a bioinformatics application that performs Bayesian inference of phylogenetic trees, can benefit from modern multi- and many-core computing architectures. We focus on exploiting fine-grain parallelism by distributing the evaluation of the conditional likelihoods (cl). Namely, we use different types of architectures: General-purpose Processors, Graphics Processing Units (GPU) and Cell Broadband Engine (Cell/BE). Besides, reconfigurable hardware can also be used as a very efficient co-processing solution to accelerate this type of applications. Therefore, we also consider the design steps and implementation of MrBayes on Field Programable Gate Arrays (FPGAs). Overall the results show that, although we can efficiently accelerate the computation of cl on GPUs and FPGAs due to their characteristics, there are still important constraints related with the access to the data in the main memory, which incurs in huge overheads. The general-purpose processors show the best results in terms of speedup.